Conventionally, a memory system including a memory cell transistor is known. Such a memory system determines data held in the memory cell transistor in a read operation on the basis of a comparison between a threshold voltage of the memory cell transistor and a determination voltage.
However, the threshold voltage of the memory cell transistor might vary depending on various factors. Meanwhile, the memory system is configured to be able to change the value of the determination voltage. In the case of occurrence of erroneous data determination in a read operation, the memory system may change the value of the determination voltage for retrying the read operation. The erroneous data determination and the retry of the read operation might be a factor of deteriorating read latency.